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Senior Engineer GPU DV

Qualcomm Inc.


Location:
Bangalore
Date:
04/23/2018
2018-04-232018-05-23
Job Code:
1963109
Qualcomm Inc.
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Job Details

Job Title Senior Engineer GPU DV
Jobid 1963109
Location: Bangalore, IND
Job Description:
**Job Id**
E1963109
Job Title
Senior Engineer GPU DV
Post Date
03/08/2018
Company
-
Division
Qualcomm Technologies, Inc.
-
CDMA Technology at http://www.qualcomm.com/about/businesses/qct
Job Area
Engineering - Hardware
Location
India - Bangalore
Job Overview
Selected candidates will be part of the Qualcomm Graphics HW team in Bangalore which is responsible for developing and delivering GPU solutions which are setting the benchmark in mobile computing industry.


In the role of ASIC Verification Engineer, you are expected to understand the graphics pipeline , design functionalities and develop and use hardware emulation platforms to verify the design


You will also be exposed to an industry-leading graphics architecture and learn about designs driving the future AR/VR solutions.


Your responsibilities will majorly include


Creating reusable design blocks, libraries and verification components for emulation.


Improving emulation/FPGA model usability for pre-silicon functional/performance validation as well as SW development and validation.


Developing verification environments ,Test plans ,writing test cases and running them on appropriate emulation builds and debug issues .


Exploring innovative verification/emulation methodologies by engaging with EDA vendors as well as enhancing existing verification methodologies


Collaborate with worldwide design, systems and software teams to achieve all verification project goals.
Minimum Qualifications
Currently, we are looking for candidates who match the skillset listed below

Experience with hardware emulators such as Synopsys Zebu, Cadence Palladium or Mentor Graphics Veloce and ability to independently develop and bring up DV platforms.

Strong debugging, analytical and independent problem solving ability.

Good working knowledge of Verilog, System Verilog, C /C++, and familiar with scripting languages such as Perl and Python.

Knowledge of GPU pipeline stages and(or) GPU performance benchmarks, conformance suites is a plus.

Strong written and verbal communication skills.
Experience

Minimum 3 years of Design verification experience

Senior positions to be offered to candidates with proven expertise in the relevant field
Preferred Qualifications
Currently, we are looking for candidates who match the skillset listed below


Experience with hardware emulators such as Synopsys Zebu, Cadence Palladium or Mentor Graphics Veloce and ability to independently develop and bring up DV platforms.


Strong debugging, analytical and independent problem solving ability.


Good working knowledge of Verilog, System Verilog, C /C++, and familiar with scripting languages such as Perl and Python.


Knowledge of GPU pipeline stages and(or) GPU performance benchmarks, conformance suites is a plus.


Strong written and verbal communication skills.


Experience


Minimum 3 years of Design verification experience


Senior positions to be offered to candidates with proven expertise in the relevant field
Education Requirements
Required: Bachelor's, Electrical Engineering

LI-IND*
EEO employer: including race, gender, gender identity, sexual orientation, disability & veterans status.


Apply on the Company Site
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