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CPU Design Verification Engineer

Qualcomm Inc.

Job Code:
Qualcomm Inc.
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Job Details

Job Title CPU Design Verification Engineer
Jobid 1959277
Location: Bangalore, IND
Job Description:
**Job Id**
Job Title
CPU Design Verification Engineer
Qualcomm Technologies, Inc.
CDMA Technology at
Job Area
Engineering - Software
India - Bangalore
Qualcomm is seeking an engineering leader to drive and manage day-to-day execution of a variety of functional blocks verification for a high-performance, low-power ARM CPU in a small team setting. Team will employ leading-edge verification technologies to create low-power, high-performance products. You will collaborate with other engineering teams to complete solutions that address functional, performance and power requirements. You will

- Provide technical oversight ensuring all specs are met

- Prioritize tasks and deliveries in a resource & schedule constrained environment

- Manage resource assignments

- Identify and track key metrics for current status and future optimizations

- Build, train, grow and retain a capable team from ground up

In this role, you may be involved in any of the following:

- Develop testbenches for verification of the CPU/L2 blocks

- Generate and run testcases on logic simulation models

- Run and debug tests to achieve architectural compliance

- Debug and correct failing testcases using simulation tools, debug tools, and programming skills

- Develop a deep understanding of the architecture, micro-architecture, and RTL design-under-test

- Document and implement testplans and testbench designs

- Define and implement functional coverage.

- Analyze coverage results and address with testbench enhancements

- Participate in testplan and testcode reviews with technical leads

- Support Post Silicon verification and bring up

All Qualcomm employees are expected to actively support diversity on their teams, and in the Company.
We are looking for engineers that possess the following skills and a minimum of 2 years of experience:

-Experience with RTL level CPU/L2 design verification

-Experience with Perl or some similar scripting language

-Experience with assembly language for ARM or other architectures

- Knowledge of CPU architecture and some use of assembly language (especially RISC).

-Experience using industry-standard RTL simulation and debug tools

- Ability to debug Verilog RTL in a System Verilog/UVM environment

- Excellent written and verbal communication skills

- Excellent critical thinking and problem solving skills

- Attention to detail, self-motivation and ability to influence teams without direct control.

Experience with micro-architecture in one or more of the following areas: Instruction fetch and decode, branch prediction, instruction scheduling, register renaming, out-of-order execution, integer and floating point execution pipes, load/store execution and caches, processor and system-level memory coherency

-Experience with the specification and creation of design test benches using UVM, Verilog, or System Verilog

-Experience with functional coverage driven verification
Education Requirements
EEO employer: including race, gender, gender identity, sexual orientation, disability & veterans status.

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