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ASIC Physical Design Engineer(s) All levels - QCT, Cork, Ireland

Qualcomm Inc.


Location:
Cork
Date:
04/19/2018
2018-04-192018-05-19
Job Code:
1960185
Qualcomm Inc.
Apply on the Company Site
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Job Details

Job Title ASIC Physical Design Engineer(s) All levels - QCT, Cork, Ireland
Jobid 1960185
Location: Cork, IRL
Job Description:
**Job Id**
E1960185
Job Title
ASIC Physical Design Engineer(s) All levels - QCT, Cork, Ireland
Post Date
04/17/2018
Company
-
Division
Qualcomm Technologies, Inc.
-
CDMA Technology at http://www.qualcomm.com/about/businesses/qct
Job Area
Engineering - Hardware
Location
Ireland - Cork
Job Overview
Qualcomm CDMA Technologies, a.k.a. QCT http://www.qualcomm.com/qct/, is the industry leader in 3G, 4G and 5G communication technology, the largest fabless semiconductor company in the world and is consistently ranked among Fortunes 100 Best Companies to Work For.
QCT offers solutions for CDMA, UMTS, GSM and LTE technologies, providing support for both 3G, 4G and 5G networks and devices. Qualcomm also offers a broad portfolio of additional wired and wireless technologies for the mobile, networking, computing and consumer electronics product segments. Our combined portfolio now features an expanded array of high-performance, end-to-end solutions ranging from Wi-Fi, GPS, Bluetooth, FM and Ethernet to HomePlug Powerline and passive optical network (PON) technologies.


All our solutions and products are elegantly engineered for optimal performance and power consumption. And our system-on-chip solutions like Snapdragon bring together CPU, GPU, connectivity, multimedia and GPS technologies in a way that is redefining mobile possibilities for people everywhere. Because of its unsurpassed performance and capabilities, Snapdragon is enhancing the mobile experience and fueling an ever-expanding array of new connected device categories, ranging from smartphones to tablets to e-readers and beyond.
This position plays a crucial role in leading and working hands-on on physical design projects. The position is ideally suited for a self-driven individual with knowledge in concepts of ASIC design in large multi-million gate SoC. Automation, Debugging Skills and Custom Design knowledge would be an added advantage. Leadership skills and Ability to work across global sites is very important to this position.
Minimum Qualifications
BSEE or MSEE with 5+ years of industry experience in the following technical areas:
+ Physical design implementation (Placement, CTS, STA) in advanced technologies.

+ Experience working on complex PHYs and related Sub Systems

+ Experience with custom physical design, pre-placement and pre-routing

+ Ability to understand complex logic structures and define new IPs targeted at performance and/or area

+ STA tool and timing closure methodologies

+ Power grid analysis. Understand tradeoff between power, performance and area

+ Clock tree implication and in-depth understanding of different CTS structures like clock mesh and multi-source CTS

+ Low-power implementation methods: CLP, power and IR drop reduction methods

+ Timing closure and implication with OCV/AOCV

+ Physical Verification: DRC/LVS and other checks.

+ Programming and scripting skills (Tcl, perl and/or C).
Preferred Qualifications
+ Strong verbal and written communication skills

+ Proven record of delivering physical design projects and automation in physical design

+ EDA experience is added advantage.

+ Prior experience as CAD engineer in tool enablement would be a plus

+ Data Analysis and Algorithm development in CAD areas

+ Experience working with diverse global teams and leading projects to closure.

+ Experience leading Physical design projects with resource across global sites.

+ Self-driven and Motivated
Education Requirements
Relevant Engineering degree
WE INVENT THE TECH THE WORLD LOVES, SO IF YOU ARE INTERESTED IN LEARNING MORE https://www.qualcomm.com/weinvent
EEO employer: including race, gender, gender identity, sexual orientation, disability & veterans status.


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